Informatics Publishing Limited

M. Zahid Alam ¹, Ravi Shankar Mishra ²

Affiliations
1 Digital Communication from M.A.N.I.T., Bhopal, IN
2 VLSI Design from C-DAC, Bangalore, IN

Abstract

Improving quality of noisy image is very important and it is one of the major area of research. Wavelet thresholding technique are very important for Denoising of images as compared to the classical methods. However it is difficult to suppress additive noise since it corrupts almost all pixels present in an image. The arithmetic mean filters are used to suppress AWGN but it introduces a problem of blurring. The objective of denoising is to suppress the noise quite efficiently while preserving the edges and other important features as much as possible. The filter-performances are compared in terms of Peak Signal to Noise Ratio (PSNR), Mean Squared Error (MSE) and Structure Similarity (SSIM). Large values of PSNR and small values of MSE indicate less noise. Simulated noise images are used to evaluate the denoising performance of proposed algorithm along with another wavelet-based denoising algorithm. Experimental result shows that the proposed denoising method outperforms standard wavelet denoising techniques in terms of the PSNR and the preservation of edge information.

Keywords

AWGN, Image Denoising, Wavelet Thresholding, Wavelet Transforms.

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Pratik Ghosh ¹, Sandeep Dhariwal ¹, Ravi Shankar Mishra ¹

Affiliations
1 SEEE, Lovely Professional University, Phagwara - 144411, Punjab, IN

Abstract

This research paper is based on various comparative analysis on precise and wide tuning Voltage Controlled Oscillators (VCO) with minimum phase noise and power consumption, using an active inductor tank circuit for Phase Locked Loop (PLL) based frequency synthesizer to support Zigbee wireless LAN standard, operating on 2.4 GHz ISM band (Industrial, Scientific, Medical), supporting 16 channels of 75MHz bandwidth+5MHz guard-band. The performance of the On-chip passive inductor based LC-VCO (inductive-capacitive) for studying the phase noise characteristics as well the tuning range for locking to the reference signal frequency for supporting Zigbee application has been done. Then it has been compared with the VCO implemented with active inductors based on gyrator technology, as the above technique has certain drawbacks in terms of frequency tuning range, limitation in terms of inductor size and Quality-factor. The analysis has been carried out on 180 nm and 90 nm CMOS technology and simulations carried out in Cadence design environment. In this paper various merits and demerits of the different methods adopted in designing the most critical PLL block, the VCO has been reviewed along with the challenges faced while designing this oscillator block for synthesizer application.

Keywords

Active and Passive Inductor, PLL, Quality-Factor, Synthesizer, VCO, Zigbee.

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